完整後設資料紀錄
DC 欄位語言
dc.contributor.authorJiang, Tai-Yingen_US
dc.contributor.authorLiu, Chien-Nan Jimmyen_US
dc.contributor.authorJou, Jing-Yangen_US
dc.date.accessioned2014-12-08T15:25:28Z-
dc.date.available2014-12-08T15:25:28Z-
dc.date.issued2005en_US
dc.identifier.isbn0-7803-8736-8en_US
dc.identifier.urihttp://hdl.handle.net/11536/17867-
dc.description.abstractSimulation based validation approaches are still the primary workhorse for solving the verification problem of getting the initial HDL description correct, especially for large scaled designs. However, most of existing code coverage metrics do not address obsevability issue [2]. Therefore, we intend to provide additional observability measures to statement coverage metric for more proper and realistic evaluation of verification completeness for a HDL design. As compared to OCCOM [1,2,3], our approach estimates a real probabilistic likelihood of propagating erroneous effects without any unreasonable assumptions and can always provide lower bound estimation.en_US
dc.language.isoen_USen_US
dc.titleAn observability measure to enhance statement coverage metric for proper evaluation of verification completenessen_US
dc.typeProceedings Paperen_US
dc.identifier.journalASP-DAC 2005: PROCEEDINGS OF THE ASIA AND SOUTH PACIFIC DESIGN AUTOMATION CONFERENCE, VOLS 1 AND 2en_US
dc.citation.spage323en_US
dc.citation.epage326en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000245021700067-
顯示於類別:會議論文