標題: Lightweight arithmetic units for VLSI digital signal processors
作者: Ou, SH
Lin, TJ
Lin, HY
Chao, CM
Liu, CW
Jen, CW
電子工程學系及電子研究所
Department of Electronics Engineering and Institute of Electronics
公開日期: 2005
摘要: This paper presents a lightweight arithmetic for embedded signal processing, whose hardware complexity is similar to that of the integer one. In our simulations, its 16-bit version has 40.18dB signal to round-off error ratio over the IEEE single-precision floating-point arithmetic, which even out-performs the hand-optimized 32-bit code with integer arithmetic.
URI: http://hdl.handle.net/11536/18048
ISBN: 0-7803-9060-1
期刊: 2005 IEEE VLSI-TSA International Symposium on VLSI Design, Automation & Test (VLSI-TSA-DAT), Proceedings of Technical Papers
起始頁: 333
結束頁: 336
顯示於類別:會議論文