Full metadata record
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Chen, WZ | en_US |
dc.contributor.author | Cheng, YL | en_US |
dc.contributor.author | Lin, DS | en_US |
dc.date.accessioned | 2014-12-08T15:25:41Z | - |
dc.date.available | 2014-12-08T15:25:41Z | - |
dc.date.issued | 2004 | en_US |
dc.identifier.isbn | 0-7803-8480-6 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/18102 | - |
dc.description.abstract | A fully integrated 10 Gbps optical receiver analog front-end, includes a trans-impedance amplifier (TIA) and a limiting amplifier (LA), is fabricated using a 0.18 mum CMOS technology. The receiver front-end provides a conversion gain up to 85 dBOmega and -3 dB bandwidth of 7.6 GHz. The sensitivity of the optical receiver is - 13 dBm at a bit-error rate of 10(-12) with 2(31)-1 pseudo-random bits. 3-D symmetric transformers are utilized in the AFE design for bandwidth enhancement. | en_US |
dc.language.iso | en_US | en_US |
dc.title | A 1.8 V, 10 Gbps fully integrated CMOS optical receiver analog front end | en_US |
dc.type | Proceedings Paper | en_US |
dc.identifier.journal | ESSCIRC 2004: PROCEEDINGS OF THE 30TH EUROPEAN SOLID-STATE CIRCUITS CONFERENCE | en_US |
dc.citation.spage | 263 | en_US |
dc.citation.epage | 266 | en_US |
dc.contributor.department | 電子工程學系及電子研究所 | zh_TW |
dc.contributor.department | Department of Electronics Engineering and Institute of Electronics | en_US |
dc.identifier.wosnumber | WOS:000225412500057 | - |
Appears in Collections: | Conferences Paper |