完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | Lin, HC | en_US |
dc.contributor.author | Yeh, KL | en_US |
dc.contributor.author | Lee, MH | en_US |
dc.contributor.author | Su, YC | en_US |
dc.contributor.author | Huang, TY | en_US |
dc.contributor.author | Shen, SW | en_US |
dc.contributor.author | Lin, HY | en_US |
dc.date.accessioned | 2014-12-08T15:25:43Z | - |
dc.date.available | 2014-12-08T15:25:43Z | - |
dc.date.issued | 2004 | en_US |
dc.identifier.isbn | 0-7803-8684-1 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/18126 | - |
dc.identifier.uri | http://dx.doi.org/10.1109/IEDM.2004.1419290 | en_US |
dc.description.abstract | A novel methodology that greatly simplifies the procedure of extracting the effective density-of-states (DOS) in polycrystalline-Si thin-film transistors (poly-Si TFTs) is proposed and demonstrated. The characterization is performed on a Schottky barrier (SB) TFT with electrical source/drain extensions induced by a field-plate. Only one single device and two simple subthreshold I-V measurements at room temperature are needed for full band-gap DOS extraction. Impacts of different process treatments are clearly resolved using this methodology. | en_US |
dc.language.iso | en_US | en_US |
dc.title | A novel methodology for extracting effective density-of-states in poly-Si thin-film transistors | en_US |
dc.type | Proceedings Paper | en_US |
dc.identifier.doi | 10.1109/IEDM.2004.1419290 | en_US |
dc.identifier.journal | IEEE INTERNATIONAL ELECTRON DEVICES MEETING 2004, TECHNICAL DIGEST | en_US |
dc.citation.spage | 781 | en_US |
dc.citation.epage | 784 | en_US |
dc.contributor.department | 電子工程學系及電子研究所 | zh_TW |
dc.contributor.department | Department of Electronics Engineering and Institute of Electronics | en_US |
dc.identifier.wosnumber | WOS:000227158500180 | - |
顯示於類別: | 會議論文 |