40GHz miniature bandpass filter design in standard CMOS process

完整後設資料紀錄

DC 欄位	值	語言
dc.contributor.author	Tso, HT	en_US
dc.contributor.author	Kuo, CN	en_US
dc.date.accessioned	2014-12-08T15:25:48Z	-
dc.date.available	2014-12-08T15:25:48Z	-
dc.date.issued	2004	en_US
dc.identifier.isbn	0-7803-8703-1	en_US
dc.identifier.uri	http://hdl.handle.net/11536/18231	-
dc.description.abstract	An on-chip high performance 40GHz miniature bandpass filter is presented. Implemented in a standard CMOS process without any extra post processing, the filter features in small size (72*400um(2)) and low insertion loss (1.1dB) by using a high slow-wave-factor coplanar stripline (HS-CPS).	en_US
dc.language.iso	en_US	en_US
dc.subject	bandpass filters	en_US
dc.subject	CMOS	en_US
dc.subject	slow-wave structures	en_US
dc.subject	coplanar stripline	en_US
dc.title	40GHz miniature bandpass filter design in standard CMOS process	en_US
dc.type	Proceedings Paper	en_US
dc.identifier.journal	2004 Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems, Digest of Papers	en_US
dc.citation.spage	239	en_US
dc.citation.epage	242	en_US
dc.contributor.department	電子工程學系及電子研究所	zh_TW
dc.contributor.department	Department of Electronics Engineering and Institute of Electronics	en_US
dc.identifier.wosnumber	WOS:000228081500061	-
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