標題: Design of a concurrent dual-band receiver front-end in 0.18um CMOS for WLANs IEEE 802.11a/b/g applications
作者: Jou, CF
Cheng, KH
Lien, WC
Wu, CH
Yen, CH
傳播研究所
Institute of Communication Studies
公開日期: 2004
摘要: A fully monolithic dual-band concurrent receiver chip for IEEE 802.11 a, 802.11 b and 802.11 g applications is presented in a 0.18-mum CMOS 1P6M technology. A low IF architecture was chosen in order to achieve a low-cost and low-power solution with a high level of integration compared to direct conversion architecture. This mixer can operate as a sub-harmonic mixer and even as a traditional Gilbert mixer if LO ports connecting to each other to found two RF inputs and two LO inputs. For a 1.8V power supply, the overall power consumptions are 84.3 mW, with 3.5 dB and 6.3 dB overall receive-chain noise figure for 2.45 GHz and 5.25 GHz, respectively.
URI: http://hdl.handle.net/11536/18356
ISBN: 0-7803-8346-X
期刊: 2004 47TH MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL I, CONFERENCE PROCEEDINGS
起始頁: 177
結束頁: 180
顯示於類別:會議論文