完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | Jou, CF | en_US |
dc.contributor.author | Cheng, KH | en_US |
dc.contributor.author | Chen, JL | en_US |
dc.date.accessioned | 2014-12-08T15:25:55Z | - |
dc.date.available | 2014-12-08T15:25:55Z | - |
dc.date.issued | 2004 | en_US |
dc.identifier.isbn | 0-7803-8511-X | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/18362 | - |
dc.description.abstract | A 2.4 GHz / 5.2 GHz self-biased dual band CMOS driver amplifier with a 9.8-dBm output power using TSMC 0.18-mu m IP6M standard CMOS process is described. The CMOS amplifier designed on Rogers R04003 printed-circuit-board (PCB) with a single input and a single output signal chain is simultaneously optimized for wireless local area network (WLAN) 2.4 GHz / 5.2 GHz applications. Simulation results show that the driver amplifier exhibits an Output power about 9.7-dBm in both 2.4 GHz and 5.2 GHz, output interception point (OIP3) of 24dBm with power added efficiency (PAE) = 27% and PAE =24% in 2.4GHz and 5.2 GHz, respectively. The die size is 0.85x0.7 mm(2). | en_US |
dc.language.iso | en_US | en_US |
dc.title | A concurrent 0.18-mu m CMOS self-biased dual-band driver amplifier for IEEE 802.11 a/b/g | en_US |
dc.type | Proceedings Paper | en_US |
dc.identifier.journal | 2004: 7TH INTERNATIONAL CONFERENCE ON SOLID-STATE AND INTEGRATED CIRCUITS TECHNOLOGY, VOLS 1- 3, PROCEEDINGS | en_US |
dc.citation.spage | 1264 | en_US |
dc.citation.epage | 1267 | en_US |
dc.contributor.department | 傳播研究所 | zh_TW |
dc.contributor.department | Institute of Communication Studies | en_US |
dc.identifier.wosnumber | WOS:000227342201112 | - |
顯示於類別: | 會議論文 |