標題: A low power, fast-switching frequency synthesizer of 5.2GHz WLANs
作者: Cheng, KH
Chen, CH
Jou, CF
電信工程研究所
Institute of Communications Engineering
公開日期: 2004
摘要: A 1.5V supply, low power consumption and fast switching integer-N frequency synthesizer is presented. The synthesizer consists of LC-tank VCO with quadrature output, D-type flip-flop (DFF) prescalar, swallow-counter, phase-frequency detector, charge pump and 4(th) order loop filter. A noble design procedure for loop filter is also presented with the aid of MATLAB program. The phase noise of VCO is -106dBc/Hz @1MHz offset. Total power consumption of synthesizer is 20.5mW. Settling time is 40us. The synthesizer is fabricated by TSMC 0.25um CMOS technology, and is suitable for HiperLAN II and IEEE 802.11a lower side-band applications.
URI: http://hdl.handle.net/11536/18363
ISBN: 0-7803-8511-X
期刊: 2004: 7TH INTERNATIONAL CONFERENCE ON SOLID-STATE AND INTEGRATED CIRCUITS TECHNOLOGY, VOLS 1- 3, PROCEEDINGS
起始頁: 1492
結束頁: 1495
Appears in Collections:Conferences Paper