標題: | Fast and precise subthreshold slope method for extracting gate capacitive coupling coefficient in flash memory cells |
作者: | Cho, CYS Chen, MJ Chen, CF 電子工程學系及電子研究所 Department of Electronics Engineering and Institute of Electronics |
公開日期: | 2003 |
摘要: | A fast and precise subthreshold slope method for extraction of gate capacitive coupling coefficient is substantially confirmed by experimental data from three types of flash memory cells: stacked gate, sidewall source-side injection (SSI), and split-gate cells. This new method furnishes promising potentials: (i) it can eliminate the effect of process variations; (ii) the traditional source or drain capacitive coupling measurement becomes unnecessary; (iii) only a few dc measurements are needed; and (iv) even dummy transistors can be removed out. Therefore, the method is highly suitable as an in-line process monitor. |
URI: | http://hdl.handle.net/11536/18442 |
ISBN: | 0-7803-7653-6 |
期刊: | ICMTS 2003: PROCEEDINGS OF THE 2003 INTERNATIONAL CONFERENCE ON MICROELECTRONIC TEST STRUCTURES |
起始頁: | 186 |
結束頁: | 190 |
Appears in Collections: | Conferences Paper |