標題: DESIGN OF AN EFFICIENT DATA-DRIVEN PIPELINED COMPUTER ARCHITECTURE
作者: LIN, CZ
TSENG, CC
CHI, KH
交大名義發表
資訊工程學系
National Chiao Tung University
Department of Computer Science
關鍵字: COMPUTER ARCHITECTURE;DATA-DRIVEN HYBRID ARCHITECTURE;PIPELINE
公開日期: 1-Jul-1995
摘要: The combination of dataflow and von Neumann execution models is a recent trend in the design of high performance computers. In this paper, a data-driven hybrid computer architecture is presented. Instead of a program counter, the principle of dynamic data-driven execution is used to control the execution of instructions in a von Neumann-style pipeline architecture. One of the operands of each dyadic instruction is explictly stored in memory, and the memory locations of the stored operands are used as tags. Matching is accomplished by simply checking a present flag and no special matching unit is required. No bubbles will occur in the pipe if sufficient parallelism exists in the program. Experimental results show that the proposed architecture outperforms two previously proposed architectures.
URI: http://hdl.handle.net/11536/1851
ISSN: 0267-6192
期刊: COMPUTER SYSTEMS SCIENCE AND ENGINEERING
Volume: 10
Issue: 3
起始頁: 179
結束頁: 186
Appears in Collections:Articles