標題: | An IDEF0/Petri net approach to the system integration in semiconductor manufacturing systems |
作者: | Lee, JS Hsu, PL 電控工程研究所 Institute of Electrical and Control Engineering |
關鍵字: | Petri nets;system integration;emulator design;IDEF0;rapid thermal process;semiconductor;manufacturing systems |
公開日期: | 2003 |
摘要: | For complex and large-scale semiconductor manufacturing systems, using real devices for system integration and testing not only increases the cost but also takes a longer time. In this paper, a systematic approach for the emulator design of the manufacturing equipment to achieve system integration is proposed. In the proposed approach, the integration definition language 0 (IDEF0) and Petri net (PN) are applied to perform the functional and behavior analyses of the equipment, and then a verified PN model can be obtained for the implementation of emulators. An application of a rapid thermal process (RTP) in semiconductor manufacturing systems is provided to illustrate the design procedure of the developed approach. |
URI: | http://hdl.handle.net/11536/18537 |
ISBN: | 0-7803-7952-7 |
ISSN: | 1062-922X |
期刊: | 2003 IEEE INTERNATIONAL CONFERENCE ON SYSTEMS, MAN AND CYBERNETICS, VOLS 1-5, CONFERENCE PROCEEDINGS |
起始頁: | 4910 |
結束頁: | 4915 |
顯示於類別: | 會議論文 |