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dc.contributor.authorHuang, CYen_US
dc.contributor.authorSu, HYen_US
dc.date.accessioned2014-12-08T15:26:13Z-
dc.date.available2014-12-08T15:26:13Z-
dc.date.issued2003en_US
dc.identifier.isbn0-7803-8185-8en_US
dc.identifier.urihttp://hdl.handle.net/11536/18611-
dc.description.abstractIn a high-speed wireless data system, based on a bias treatment (through a scheduler control.) on good RF-condition users, the system could potentially reach high throughput if good RF users have the infinite data to send. But, in reality, most data applications have only finite sizes. With this finite-size constraint, users at poor RE conditions will occupy more timing resources than good RF users to finish the transmission of a data packet call. As a result, we will show analytically that to improve system performance, scheduler algorithms not only should focus on allocating more resources to good RF users but also need to improve low data rate users at the same time. Based on the 1xEV-DO technology, two scheduler design concepts are used to evaluate the impacts on the system throughput for both the infinite data buffer case and the finite data buffer case.en_US
dc.language.isoen_USen_US
dc.subjectwirelessen_US
dc.subjectCDMAen_US
dc.subjectdataen_US
dc.subject1xEV-DOen_US
dc.subject3Gen_US
dc.subjectfairnessen_US
dc.subjectscheduleren_US
dc.subjectdata modelen_US
dc.subjectsystem throughputen_US
dc.titlePractical design considerations for next generation high-speed data wireless systemsen_US
dc.typeProceedings Paperen_US
dc.identifier.journalICICS-PCM 2003, VOLS 1-3, PROCEEDINGSen_US
dc.citation.spage349en_US
dc.citation.epage353en_US
dc.contributor.department電機學院zh_TW
dc.contributor.departmentCollege of Electrical and Computer Engineeringen_US
dc.identifier.wosnumberWOS:000222026600073-
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