SOC design integration by using automatic interconnection rectification

完整後設資料紀錄

DC 欄位	值	語言
dc.contributor.author	Wang, CY	en_US
dc.contributor.author	Tung, SW	en_US
dc.contributor.author	Jou, JY	en_US
dc.date.accessioned	2014-12-08T15:26:15Z	-
dc.date.available	2014-12-08T15:26:15Z	-
dc.date.issued	2003	en_US
dc.identifier.isbn	0-7803-7761-3	en_US
dc.identifier.uri	http://hdl.handle.net/11536/18646	-
dc.description.abstract	This paper presents an automatic interconnection rectification (AIR) technique to correct the misplaced interconnection occurred in the integration of a SoC design automatically. The experimental results show that the AIR can correct the misplaced interconnection and therefore accelerates the integration verification of a SoC design.	en_US
dc.language.iso	en_US	en_US
dc.title	SOC design integration by using automatic interconnection rectification	en_US
dc.type	Proceedings Paper	en_US
dc.identifier.journal	PROCEEDINGS OF THE 2003 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL IV: DIGITAL SIGNAL PROCESSING-COMPUTER AIDED NETWORK DESIGN-ADVANCED TECHNOLOGY	en_US
dc.citation.spage	744	en_US
dc.citation.epage	747	en_US
dc.contributor.department	電子工程學系及電子研究所	zh_TW
dc.contributor.department	Department of Electronics Engineering and Institute of Electronics	en_US
dc.identifier.wosnumber	WOS:000184904400187	-
顯示於類別：	會議論文