完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | Ker, MD | en_US |
dc.contributor.author | Tsai, CS | en_US |
dc.date.accessioned | 2014-12-08T15:26:15Z | - |
dc.date.available | 2014-12-08T15:26:15Z | - |
dc.date.issued | 2003 | en_US |
dc.identifier.isbn | 0-7803-7761-3 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/18647 | - |
dc.description.abstract | This paper presents a 2.5V/5V mixed-voltage CMOS I/O buffer that does not need a CMOS technology with a dual-oxide option and complex bias circuits. The proposed mixed-voltage I/O buffer with simpler circuit structure can overcome the problems of leakage current and gate-oxide reliability, which occurring in the conventional CMOS I/O buffer. In this work, the new proposed design has been realized in a 0.25-mum CMOS process, but it can be easily scaled toward 0.18-mum or 0.15-mum processes to serve a 1.8V/3.3V mixed-voltage I/O interface. | en_US |
dc.language.iso | en_US | en_US |
dc.title | Design of 2.5V/5V mixed-voltage CMOS I/O buffer with only thin oxide device and dynamic N-well bias circuit | en_US |
dc.type | Proceedings Paper | en_US |
dc.identifier.journal | PROCEEDINGS OF THE 2003 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL V: BIO-MEDICAL CIRCUITS & SYSTEMS, VLSI SYSTEMS & APPLICATIONS, NEURAL NETWORKS & SYSTEMS | en_US |
dc.citation.spage | 97 | en_US |
dc.citation.epage | 100 | en_US |
dc.contributor.department | 電機學院 | zh_TW |
dc.contributor.department | College of Electrical and Computer Engineering | en_US |
dc.identifier.wosnumber | WOS:000184904800025 | - |
顯示於類別: | 會議論文 |