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Electrostatic discharge protection design for mixed-voltage CMOS I/O buffers

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10.1109/JSSC.2002.800933

Abstract

A new electrostatic discharge (ESD) protection circuit, using the stacked-nMOS triggered silicon controlled rectifier (SNTSCR) as the ESD clamp device, is designed to protect the mixed-voltage I/O buffers of CMOS ICs. The new proposed ESD protection circuit, which combines the stacked-nMOS structure with the gate-coupling circuit technique into the SCR device, is fully compatible to general CMOS processes without causing the gate-oxide reliability problem. Without using the thick gate oxide, the experimental results in a 0.35-mum CMOS process have proven that the human-body-model ESD level of the mixed-voltage I/O buffer can be successfully increased from the original similar to2 kV to >8 kV by using this proposed ESD protection circuit.

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