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dc.contributor.authorKer, MDen_US
dc.contributor.authorChuang, CHen_US
dc.date.accessioned2014-12-08T15:42:10Z-
dc.date.available2014-12-08T15:42:10Z-
dc.date.issued2002-08-01en_US
dc.identifier.issn0018-9200en_US
dc.identifier.urihttp://dx.doi.org/10.1109/JSSC.2002.800933en_US
dc.identifier.urihttp://hdl.handle.net/11536/28649-
dc.description.abstractA new electrostatic discharge (ESD) protection circuit, using the stacked-nMOS triggered silicon controlled rectifier (SNTSCR) as the ESD clamp device, is designed to protect the mixed-voltage I/O buffers of CMOS ICs. The new proposed ESD protection circuit, which combines the stacked-nMOS structure with the gate-coupling circuit technique into the SCR device, is fully compatible to general CMOS processes without causing the gate-oxide reliability problem. Without using the thick gate oxide, the experimental results in a 0.35-mum CMOS process have proven that the human-body-model ESD level of the mixed-voltage I/O buffer can be successfully increased from the original similar to2 kV to >8 kV by using this proposed ESD protection circuit.en_US
dc.language.isoen_USen_US
dc.subjectelectrostatic discharge (ESD)en_US
dc.subjectESD protection circuiten_US
dc.subjectmixed-voltage I/O bufferen_US
dc.subjectsilicon controlled rectifier (SCR)en_US
dc.titleElectrostatic discharge protection design for mixed-voltage CMOS I/O buffersen_US
dc.typeArticleen_US
dc.identifier.doi10.1109/JSSC.2002.800933en_US
dc.identifier.journalIEEE JOURNAL OF SOLID-STATE CIRCUITSen_US
dc.citation.volume37en_US
dc.citation.issue8en_US
dc.citation.spage1046en_US
dc.citation.epage1055en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000177051200010-
dc.citation.woscount21-
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