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dc.contributor.authorKER, MDen_US
dc.contributor.authorWU, CYen_US
dc.date.accessioned2014-12-08T15:03:20Z-
dc.date.available2014-12-08T15:03:20Z-
dc.date.issued1995-06-01en_US
dc.identifier.issn0018-9383en_US
dc.identifier.urihttp://hdl.handle.net/11536/1871-
dc.description.abstractA novel method to characterize the mechanism of positive-feedback regeneration in a p-n-p-n structure during CMOS latchup transition is developed, It is based on the derived time-varying transient poles in large-signal base-emitter voltages of the lumped equivalent circuit of a p-n-p-n structure, Through calculating the time-varying transient poles during CMOS latchup transition, it is found that there exists a transient pole to change from negative to positive and then this pole changes to negative again, A p-n-p-n structure, which has a stronger positive-Feedback regeneration during turn-on transition, will lead to a larger positive transient pole, The time when the positive transient pole occurs during CMOS latchup transition is the time when the positive-feedback regeneration starts, By this positive transient pole, the positive-feedback regenerative process of CMOS latchup can he quantitatively characterized.en_US
dc.language.isoen_USen_US
dc.titleMODELING THE POSITIVE-FEEDBACK REGENERATIVE PROCESS OF CMOS LATCHUP BY A POSITIVE TRANSIENT POLE METHOD .1. THEORETICAL DERIVATIONen_US
dc.typeArticleen_US
dc.identifier.journalIEEE TRANSACTIONS ON ELECTRON DEVICESen_US
dc.citation.volume42en_US
dc.citation.issue6en_US
dc.citation.spage1141en_US
dc.citation.epage1148en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:A1995QZ20000018-
dc.citation.woscount28-
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