標題: | A new high-performance CMOS GHZ power amplifier design with common-mode signal cancellation technique |
作者: | Wu, CY Wang, WC Chen, TM 電子工程學系及電子研究所 Department of Electronics Engineering and Institute of Electronics |
公開日期: | 2002 |
摘要: | This work describes a novel common-made signal rejection method for power amplifiers. A power amplifier with standard 1P5M 0.25mum CMOS technology was simulated and analyzed. This common-mode signal cancellation method makes the performance, in terms of output power and efficiency of the power amplifier, more immune to input common-mode signals than conventional power amplifiers. Simulated results indicate that this fully balanced differential power amplifier yields 24dBm output power at 2.45GHz, from a 3.3V power supply. The simulated drain efficiency is 33.21%, and the overall power-added efficiency is 32.84%. The power amplifier is highly linear. |
URI: | http://hdl.handle.net/11536/18843 |
ISBN: | 0-7803-7690-0 |
期刊: | APCCAS 2002: ASIA-PACIFIC CONFERENCE ON CIRCUITS AND SYSTEMS, VOL 2, PROCEEDINGS |
起始頁: | 395 |
結束頁: | 398 |
顯示於類別: | 會議論文 |