完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | Ker, MD | en_US |
dc.contributor.author | Hsu, KC | en_US |
dc.date.accessioned | 2014-12-08T15:26:37Z | - |
dc.date.available | 2014-12-08T15:26:37Z | - |
dc.date.issued | 2002 | en_US |
dc.identifier.isbn | 0-7803-7448-7 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/18921 | - |
dc.description.abstract | A novel design concept to turn on the SCR device by applying the substrate-triggered method is first proposed in the literature for effective on-chip ESD protection design. To avoid the, transient-induced latch-up issue, the substrate-triggered SCR devices are stacked in the ESD protection circuits. The turn-on efficiency of SCR can be greatly improved by applying the substrate-triggered method. The on-chip ESD protection circuits designed with the substrate-triggered SCR devices for input pad, output pad, and power pad have been successfully verified in a 0.25-mum CMOS process. The substrate-triggered SCR device with a smaller layout area of only 40mumx20mum can sustain the HBM ESD stress of higher than 7kV. | en_US |
dc.language.iso | en_US | en_US |
dc.title | On-chip ESD protection circuit design with novel substrate-triggered SCR device in sub-quarter-micron CMOS process | en_US |
dc.type | Proceedings Paper | en_US |
dc.identifier.journal | 2002 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL V, PROCEEDINGS | en_US |
dc.citation.spage | 529 | en_US |
dc.citation.epage | 532 | en_US |
dc.contributor.department | 電子工程學系及電子研究所 | zh_TW |
dc.contributor.department | Department of Electronics Engineering and Institute of Electronics | en_US |
dc.identifier.wosnumber | WOS:000186328700133 | - |
顯示於類別: | 會議論文 |