Title: Socillator test: A delay test scheme for embedded ICs in the boundary-scan environment
Authors: Tan, TJ
Lee, CL
電子工程學系及電子研究所
Department of Electronics Engineering and Institute of Electronics
Keywords: delay testing;embedded testing;SOC testing;oscillation test;system test
Issue Date: 2001
Abstract: A novel test scheme, which uses an oscillation source to supply the test signal and a transition detector to detect the arrival of the transition of the test signal through the CUT within the specific delay rime, is proposed. The scheme is ideal to test embedded chips in the boundary scan environment within an SOC.
URI: http://hdl.handle.net/11536/19041
ISBN: 0-7695-1123-6
ISSN: 1093-0167
Journal: 19TH IEEE VLSI TEST SYMPOSIUM, PROCEEDINGS
Begin Page: 158
End Page: 162
Appears in Collections:Conferences Paper