A PLC-based design for the sequence controller in discrete event systems

Abstract

Recently, methods have been proposed for obtaining the ladder logic diagram (LLD) based on the Petri net (PN). However, those resulting LLDs are usually not in compact forms. Moreover, forming the PN structures to model manufacturing processes is not straightforward. In this paper, we propose a simplified Petri net controller (SPNC) by introducing sensor states into the PN. A compact LLD can be then obtained through the token passing logic (TPL). By employing the integration definition language 0 (IDEF0) technique, we obtain the SPNC structure sequentially through diagrams. The result of an integrated IPTL (IDEF0/SPNC/TPL/LLD) algorithm, including the IDEF0, SPNC, and TPL tools, leads to the standard IEC1131-3 LLD for PLC implementation. An example of a mark stamping system is provided to illustrate the developed material The flow diagrams and information design approach.