完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | Lin, JW | en_US |
dc.contributor.author | Lee, CL | en_US |
dc.contributor.author | Su, CC | en_US |
dc.contributor.author | Chen, JE | en_US |
dc.date.accessioned | 2014-12-08T15:27:06Z | - |
dc.date.available | 2014-12-08T15:27:06Z | - |
dc.date.issued | 2000 | en_US |
dc.identifier.isbn | 0-7695-0888-X | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/19325 | - |
dc.description.abstract | This paper presents a novel scheme to diagnose single and double faults for linear analog circuits. The scheme first proposes a simple transformation procedure to transform the tested linear analog circuit into discrete signal flow graph, then constructs "diagnosing evaluators", which model the faulty components, to form a diagnosis configuration to diagnose the faults through digital simulation. This saves much computation time. Furthermore, a simple method to un-power the OP's is also proposed to differentiate equivalent faults. The scheme can diagnose faults in passive components as well as faults in OP's. | en_US |
dc.language.iso | en_US | en_US |
dc.title | Fault diagnosis for linear analog circuits | en_US |
dc.type | Proceedings Paper | en_US |
dc.identifier.journal | PROCEEDINGS OF THE NINTH ASIAN TEST SYMPOSIUM (ATS 2000) | en_US |
dc.citation.spage | 25 | en_US |
dc.citation.epage | 30 | en_US |
dc.contributor.department | 電子工程學系及電子研究所 | zh_TW |
dc.contributor.department | Department of Electronics Engineering and Institute of Electronics | en_US |
dc.identifier.wosnumber | WOS:000166979100005 | - |
顯示於類別: | 會議論文 |