標題: | A behavior-level fault model for the closed-loop operational amplifier |
作者: | Chang, YJ Lee, CL Chen, JE Su, CC 電子工程學系及電子研究所 Department of Electronics Engineering and Institute of Electronics |
關鍵字: | fault simulation;fault model;macro-modeling;operational amplifier;analog/mixed testing;Monte Carlo |
公開日期: | 1-九月-2000 |
摘要: | In this paper, a simple behavior-level fault model, which is able to represent the faulty behavior of the closed-loop operational amplifier (OP), is presented. The fault model, derived from the macro equivalent circuit of the OP but verified with transistor level simulation, consists of the offset fault and the limited-current fault. It can represent the faulty behavior of the dosed loop OP of all the transistor parametric (soft) faults and many of the catastrophic (hard) faults. Due to its simplicity, the proposed fault model (1) significantly reduces the complexity of fault simulation, and (2) makes closed-form analysis of the faulty behavior of the closed loop OP feasible when the closed loop OP is used as a basic building block of a complicated circuit. Although derived for DC, it can also be applied to AC fault analysis. |
URI: | http://hdl.handle.net/11536/30292 |
ISSN: | 1016-2364 |
期刊: | JOURNAL OF INFORMATION SCIENCE AND ENGINEERING |
Volume: | 16 |
Issue: | 5 |
起始頁: | 751 |
結束頁: | 766 |
顯示於類別: | 期刊論文 |