完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | Huang, WF | en_US |
dc.contributor.author | Shie, JS | en_US |
dc.contributor.author | Lee, C | en_US |
dc.contributor.author | Gong, SC | en_US |
dc.contributor.author | Peng, CJ | en_US |
dc.date.accessioned | 2014-12-08T15:27:08Z | - |
dc.date.available | 2014-12-08T15:27:08Z | - |
dc.date.issued | 1999 | en_US |
dc.identifier.isbn | 0-8194-3494-9 | en_US |
dc.identifier.issn | 0277-786X | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/19368 | - |
dc.identifier.uri | http://dx.doi.org/10.1117/12.368460 | en_US |
dc.description.abstract | Wafer level packaging received lots of attention in microsystems recently. Because it shows the potential to reduce the packaging cost, while the yield of devices after dicing and packaging can be increased. However, there is a limitation of commercialized wafer bonding technology, i.e., the high process temperature, such as 1000 degrees C of silicon fusion bonding, and 450 degrees C of anodic bonding. A novel low temperature wafer bonding with process temperature lower than 160 degrees C is proposed, it applies the In-Sn alloy to form the interface of wafer bonding. The experiment results show helium leak test of 6x10(-9)torr-liter/sec, and a tensile strength as high as 200kg/cm(2). Reliability test after 1500 temperature cycles between -10 to 80 degrees C also shows no trace of degradation compared to the initial quality of the samples. This low temperature soldering process demonstrates its promising potential at the wafer level packaging in industrial production. | en_US |
dc.language.iso | en_US | en_US |
dc.subject | wafer bonding | en_US |
dc.subject | soldering | en_US |
dc.subject | sealing | en_US |
dc.subject | package | en_US |
dc.subject | microsensors | en_US |
dc.title | Development of low-temperature wafer level vacuum packaging for microsensors | en_US |
dc.type | Proceedings Paper | en_US |
dc.identifier.doi | 10.1117/12.368460 | en_US |
dc.identifier.journal | DESIGN, CHARACTERIZATION, AND PACKAGING FOR MEMS AND MICROELECTRONICS | en_US |
dc.citation.volume | 3893 | en_US |
dc.citation.spage | 478 | en_US |
dc.citation.epage | 485 | en_US |
dc.contributor.department | 光電工程學系 | zh_TW |
dc.contributor.department | Department of Photonics | en_US |
dc.identifier.wosnumber | WOS:000084509900050 | - |
顯示於類別: | 會議論文 |