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dc.contributor.authorCHEN, MJen_US
dc.contributor.authorGU, YBen_US
dc.contributor.authorWU, Ten_US
dc.contributor.authorHSU, PCen_US
dc.contributor.authorLIU, THen_US
dc.date.accessioned2014-12-08T15:03:24Z-
dc.date.available2014-12-08T15:03:24Z-
dc.date.issued1995-05-01en_US
dc.identifier.issn0018-9200en_US
dc.identifier.urihttp://dx.doi.org/10.1109/4.384177en_US
dc.identifier.urihttp://hdl.handle.net/11536/1939-
dc.description.abstractThe on chip test circuit for examining the charge injection in analog MOS switches has been described in detail, and has been fabricated and characterized. Mixed-mode circuit and device simulations have been performed, creating excellent agreements not only with the experimental waveforms but also with the measured switch-induced error voltage, Further investigation of the experimental and simulated results has separated the charge injection into three distinct components: i) the channel charges in strong inversion; ii) the channel charges in weak inversion; and iii) the charges coupled through the gate-to-diffusion overlap capacitance, Important observations concerning the weak inversion charge injection have been drawn from the waveform of the current through the switched capacitor, In this work the channel charges in weak inversion have exhibited a 20% contribution to the switch-induced error voltage on a switched capacitor.en_US
dc.language.isoen_USen_US
dc.titleWEAK INVERSION CHARGE INJECTION IN ANALOG MOS SWITCHESen_US
dc.typeNoteen_US
dc.identifier.doi10.1109/4.384177en_US
dc.identifier.journalIEEE JOURNAL OF SOLID-STATE CIRCUITSen_US
dc.citation.volume30en_US
dc.citation.issue5en_US
dc.citation.spage604en_US
dc.citation.epage606en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:A1995QV83200013-
dc.citation.woscount11-
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