完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | Chen, TS | en_US |
dc.contributor.author | Liu, DZ | en_US |
dc.contributor.author | Wei, CH | en_US |
dc.date.accessioned | 2014-12-08T15:27:12Z | - |
dc.date.available | 2014-12-08T15:27:12Z | - |
dc.date.issued | 1999 | en_US |
dc.identifier.isbn | 0-7803-5472-9 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/19418 | - |
dc.description.abstract | The digital sinlock loop (DSL) is a nonuniform-sampling digital phase-locked loop (DPLL), whose phase error detector using the arcsine function with the quadrature samples of incoming signal, has a linear characteristics with a period of 2 pi. The phase equalizer using the decision-feedback phase tracking method operates only on the phase information to avoid the multiplication operations required in conventional equalization algorithms. In this paper, combined carrier phase tracking and phase equalization is investigated for pi/4-DQPSK signals in the mobile radio system. | en_US |
dc.language.iso | en_US | en_US |
dc.title | Combined carrier phase tracking and equalization for pi/4-DQPSK signals in mobile radio | en_US |
dc.type | Proceedings Paper | en_US |
dc.identifier.journal | ISCAS '99: PROCEEDINGS OF THE 1999 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL 3: ANALOG AND DIGITAL SIGNAL PROCESSING | en_US |
dc.citation.spage | 82 | en_US |
dc.citation.epage | 85 | en_US |
dc.contributor.department | 電子工程學系及電子研究所 | zh_TW |
dc.contributor.department | Department of Electronics Engineering and Institute of Electronics | en_US |
dc.identifier.wosnumber | WOS:000081715300021 | - |
顯示於類別: | 會議論文 |