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dc.contributor.authorWang, THen_US
dc.contributor.authorHsu, CFen_US
dc.contributor.authorChiang, LPen_US
dc.contributor.authorZous, NKen_US
dc.contributor.authorChao, TSen_US
dc.contributor.authorChang, CYen_US
dc.date.accessioned2014-12-08T15:27:15Z-
dc.date.available2014-12-08T15:27:15Z-
dc.date.issued1998en_US
dc.identifier.isbn0-7803-4400-6en_US
dc.identifier.urihttp://hdl.handle.net/11536/19496-
dc.identifier.urihttp://dx.doi.org/10.1109/RELPHY.1998.670552en_US
dc.description.abstractDrain leakage current degradation at zero V-gs in a hot carrier stressed n-MOSFET is measured and modeled. The dependences of drain leakage current on supply voltage and temperature are characterized. In modeling, various drain leakage current mechanisms including drain-to-source subthreshold leakage current, band-to-band tunneling current and interface trap assisted leakage current are taken into account. Our result shows that interface trap induced leakage current appears to be a dominant drain leakage mechanism as the supply voltage is scaled below 3.0V. Drain leakage current degradation by orders of magnitude has been observed due to hot carrier stress.en_US
dc.language.isoen_USen_US
dc.titleVoltage scaling and temperature effects on drain leakage current degradation in a hot carrier stressed n-MOSFETen_US
dc.typeProceedings Paperen_US
dc.identifier.doi10.1109/RELPHY.1998.670552en_US
dc.identifier.journal1998 IEEE INTERNATIONAL RELIABILITY PHYSICS SYMPOSIUM PROCEEDINGS - 36TH ANNUALen_US
dc.citation.spage209en_US
dc.citation.epage213en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000073835800033-
Appears in Collections:Conferences Paper


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