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dc.contributor.authorCheng, SCen_US
dc.contributor.authorHang, HMen_US
dc.date.accessioned2014-12-08T15:27:18Z-
dc.date.available2014-12-08T15:27:18Z-
dc.date.issued1998en_US
dc.identifier.isbn0-7803-4455-3en_US
dc.identifier.urihttp://hdl.handle.net/11536/19543-
dc.description.abstractThe goal of this paper is to study the impact of MPEG encoding algorithms from a system-level design viewpoint. An area-time estimation tool is developed to extract the timing requirement and silicon area for various combinations of hardware modules and algorithms. After complemented the design of several modules in an MPEG encoder, we found that the motion estimation and rate control modules consume most part of the silicon area in the encoding chip. We also evaluated the entire chip area of a few cases for two picture formats. The methodology and results presented here should provide useful guidelines in selecting an appropriate MPEG encoding algorithm for VLSI design.en_US
dc.language.isoen_USen_US
dc.titleThe impact of encoding algorithms on MPEG VLSI implementationen_US
dc.typeProceedings Paperen_US
dc.identifier.journalISCAS '98 - PROCEEDINGS OF THE 1998 INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-6en_US
dc.citation.spageC102en_US
dc.citation.epageC105en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000075224600466-
Appears in Collections:Conferences Paper