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dc.contributor.authorJou, JYen_US
dc.contributor.authorNien, MCen_US
dc.date.accessioned2014-12-08T15:27:27Z-
dc.date.available2014-12-08T15:27:27Z-
dc.date.issued1997en_US
dc.identifier.isbn0-8186-8207-8en_US
dc.identifier.issn1063-6404en_US
dc.identifier.urihttp://hdl.handle.net/11536/19705-
dc.description.abstractThe power consumption and testability are two of major considerations in modem VLSI design, A full-scan method had been used widely in the past to improve the testability of sequential circuits. Due to the lower overheads incurred the partial-scan design has gradually become popular. In this paper we propose a partial scan selection strategy that bases on the structural analysis approach and considers the area and power overheads simultaneously. A powerful sample-and-search algorithm is used to find the solution that minimizes the user-specified cost function in term of power and area overheads. The experimental results show that our sample-and-search algorithm can effectively find the best solution of the specified cost function for almost all circuits, and the saving of overheads an average for each specific cost function is significant.en_US
dc.language.isoen_USen_US
dc.titlePower driven partial scanen_US
dc.typeProceedings Paperen_US
dc.identifier.journalINTERNATIONAL CONFERENCE ON COMPUTER DESIGN - VLSI IN COMPUTERS AND PROCESSORS, PROCEEDINGSen_US
dc.citation.spage642en_US
dc.citation.epage647en_US
dc.contributor.department交大名義發表zh_TW
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentNational Chiao Tung Universityen_US
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:A1997BJ80H00089-
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