標題: 功率驅動的部分掃描
Power Driven Partial Scan Selection
作者: 粘明章
Nien, Ming-Chang
周景揚
Jing-Yang Jou
電子研究所
關鍵字: 功率;測試;掃描;部分掃描;Power;Testing;Scan;Partial Scan
公開日期: 1995
摘要: 在晚近的超大型積體電路設計中,功率消耗和可測試性是主要的考量
中的兩個。過去一種全掃描的方法被廣泛的使用來改善電路的可測試性,
但由於其過高的效率耗損,部分掃描的方法漸漸的受歡迎。在部份掃描的
設計中,最主要的關鍵即在於如何選擇掃描暫存閘。在這本論文中,我們
提出一種植基於構造分析的暫存閘選擇策略,其同時考慮功率消耗和面積
增加的問題,並且使用一種搜尋方法去得到根據使用者自訂成本公式而計
算出的最佳解。實驗結果顯示我們的搜尋方法在大部份的狀況下都可以找
到最佳解,且在特定的成本公式下可得到一平均25.58% 的額外效率損耗
的節省。
The power consumption and testability are two of major
considerations in modern VLSI design. A full-scan method had
been used widely in the past to improve the testability of
sequential circuits. Due to the lower overheads incurred, the
partial-scan design has gradually become popular. The main
issue of partial-scan design is how to select the scan flip-
flops. In this thesis, we propose a partial scan selection
strategy that based on the structural analysis approach
and considers the area and power overheads simultaneously.
A powerful samle-and-search algorithm is used to find the
solution that minimizes the user-specified cost function in term
of power and area overheads. The experimental results show that
our sample-and-search algorithm can effectively find the
best solution for almost all circuits, and a 25.58% saving of
overheads on average was obtained for a specific cost
function.
URI: http://140.113.39.130/cdrfb3/record/nctu/#NT840430032
http://hdl.handle.net/11536/60631
顯示於類別:畢業論文