標題: Data line driver design for a 10'' 480x640x3 color FED
作者: Wang, CC
Wu, JC
Huang, CM
交大名義發表
電子工程學系及電子研究所
National Chiao Tung University
Department of Electronics Engineering and Institute of Electronics
公開日期: 1996
摘要: A data line driver with 120 outputs and capable of producing contrast ratio over 100 for a 10'' 480x(640x3) pixels color field emission display (FED) panel have been designed. Three phase clocks were used to reduce the maximum operating frequency to 22.68Mhz. A class AB Op Amp was used as the analog output buffer to reduce the power dissipation. The chip is implemented in a 24V CMOS process, chip size is 7620 mu m x 17500 mu m.
URI: http://hdl.handle.net/11536/19905
ISBN: 0-7803-3594-5
期刊: IVMC '96 - 9TH INTERNATIONAL VACUUM MICROELECTRONICS CONFERENCE, TECHNICAL DIGEST
起始頁: 557
結束頁: 561
Appears in Collections:Conferences Paper