SOME NEW DESIGNS OF 2-D ARRAY FOR MATRIX MULTIPLICATION AND TRANSITIVE CLOSURE

doi:10.1109/71.372789

完整後設資料紀錄

DC 欄位	值	語言
dc.contributor.author	TSAY, JC	en_US
dc.contributor.author	CHANG, PY	en_US
dc.date.accessioned	2014-12-08T15:03:27Z	-
dc.date.available	2014-12-08T15:03:27Z	-
dc.date.issued	1995-04-01	en_US
dc.identifier.issn	1045-9219	en_US
dc.identifier.uri	http://dx.doi.org/10.1109/71.372789	en_US
dc.identifier.uri	http://hdl.handle.net/11536/2000	-
dc.description.abstract	In this paper, we present some new regular iterative algorithms for matrix multiplication and transitive closure. With these algorithms, by spacetime mapping the 2-D arrays with 2N-1 and [(3N-1)/2] execution times for matrix multiplication can be obtained, Meanwhile, we can derive a 2-D array with 4N-2 execution time for transitive closure based on the sequential Warshall-Floyd algorithm. All these new 2-D arrays for matrix multiplication and transitive closure have the advantages of faster and more regular than other previous designs.	en_US
dc.language.iso	en_US	en_US
dc.subject	ALGORITHM MAPPING	en_US
dc.subject	MATRIX MULTIPLICATION	en_US
dc.subject	MESH ARRAY	en_US
dc.subject	SYSTOLIC ARRAY	en_US
dc.subject	SPHERICAL ARRAY	en_US
dc.subject	TRANSITIVE CLOSURE	en_US
dc.subject	VLSI	en_US
dc.title	SOME NEW DESIGNS OF 2-D ARRAY FOR MATRIX MULTIPLICATION AND TRANSITIVE CLOSURE	en_US
dc.type	Article	en_US
dc.identifier.doi	10.1109/71.372789	en_US
dc.identifier.journal	IEEE TRANSACTIONS ON PARALLEL AND DISTRIBUTED SYSTEMS	en_US
dc.citation.volume	6	en_US
dc.citation.issue	4	en_US
dc.citation.spage	351	en_US
dc.citation.epage	362	en_US
dc.contributor.department	交大名義發表	zh_TW
dc.contributor.department	工學院	zh_TW
dc.contributor.department	National Chiao Tung University	en_US
dc.contributor.department	College of Engineering	en_US
dc.identifier.wosnumber	WOS:A1995QP14200002	-
dc.citation.woscount	3	-
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