| 標題: | INTEGRATED DIAGNOSIS AND RECONFIGURATION PROCESS FOR DEFECT TOLERANT WSI PROCESSOR ARRAYS |
| 作者: | WANG, KC LIN, JW 資訊工程學系 Department of Computer Science |
| 公開日期: | 1994 |
| URI: | http://hdl.handle.net/11536/20106 |
| ISBN: | 0-7803-1849-8 |
| ISSN: | 1063-2204 |
| 期刊: | INTERNATIONAL CONFERENCE ON WAFER SCALE INTEGRATION: IEEE 1994 PROCEEDINGS SIXTH ANNUAL |
| 起始頁: | 198 |
| 結束頁: | 207 |
| 顯示於類別： | 會議論文 |
- 可容錯處理機陣列之整合診斷與結構重組程序 / 林振緯;王國禎
- 電子式硬碟之測試與重組 / 王志明;Chih-Ming Wang;張明峰;Ming-Feng Chang
- LOOP-BASED DESIGN AND RECONFIGURATION OF WAFER-SCALE LINEAR ARRAYS WITH HIGH HARVEST RATES / CHANG, MF;FUCHS, WK
- 大面積超大型積體電路平行結構之整合珍斷與結構重組程序 / 王國禎;WANG KUO-CHEN
- DESIGN OF ALGORITHM-BASED FAULT-TOLERANT VLSI ARRAY PROCESSOR / LIU, CM;JEN, CW
- Reaching fault diagnosis agreement under a hybrid fault / Hsiao, HS;Chin, YH;Yang, WP
- The minimum distance diagram of double-loop networks / Chen, CY;Hwang, FK
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