INTEGRATED DIAGNOSIS AND RECONFIGURATION PROCESS FOR DEFECT TOLERANT WSI PROCESSOR ARRAYS

完整後設資料紀錄

DC 欄位	值	語言
dc.contributor.author	WANG, KC	en_US
dc.contributor.author	LIN, JW	en_US
dc.date.accessioned	2014-12-08T15:27:51Z	-
dc.date.available	2014-12-08T15:27:51Z	-
dc.date.issued	1994	en_US
dc.identifier.isbn	0-7803-1849-8	en_US
dc.identifier.issn	1063-2204	en_US
dc.identifier.uri	http://hdl.handle.net/11536/20106	-
dc.language.iso	en_US	en_US
dc.title	INTEGRATED DIAGNOSIS AND RECONFIGURATION PROCESS FOR DEFECT TOLERANT WSI PROCESSOR ARRAYS	en_US
dc.type	Proceedings Paper	en_US
dc.identifier.journal	INTERNATIONAL CONFERENCE ON WAFER SCALE INTEGRATION: IEEE 1994 PROCEEDINGS SIXTH ANNUAL	en_US
dc.citation.spage	198	en_US
dc.citation.epage	207	en_US
dc.contributor.department	資訊工程學系	zh_TW
dc.contributor.department	Department of Computer Science	en_US
dc.identifier.wosnumber	WOS:A1994BA36U00019	-
顯示於類別：	會議論文