標題: Investigations of an Independent Double-Gated Polycrystalline Silicon Nanowire Thin Film Transistor for Nonvolatile Memory Operations
作者: Chen, Wei-Chen
Lin, Horng-Chih
Huang, Tiao-Yuan
電子工程學系及電子研究所
Department of Electronics Engineering and Institute of Electronics
公開日期: 1-八月-2011
摘要: In this study, we investigate the merits of an independent double-gated configuration for nonvolatile memory operations. In contrast to the convention where the programming/erasing gate also acts as the read gate, a dedicated read gate with an oxide-only dielectric is proposed in the new mode. Using the same device under identical programming/erasing conditions, greatly improved programming speed (e.g., 61% increase under the stress condition of 18 V for 10 mu s) is achieved, while the erasing speed, albeit initially retarded, shows enhancement when the erasing time is larger than a certain value, which can be explained by the back-gate bias effects. Retention characterization indicates that the new mode offers a larger memory window after 10 year extrapolation. In addition, a proper auxiliary gate bias applied during programming/erasing processes is found to improve the programming/erasing speed. Finally, by taking advantage of the separate-gated feature, two independent storage sites can be obtained by employing an oxide-nitride-oxide layer as the dielectric for both gates, thus realizing 2-bit/cell functionality. (C) 2011 The Japan Society of Applied Physics
URI: http://dx.doi.org/10.1143/JJAP.50.085002
http://hdl.handle.net/11536/20660
ISSN: 0021-4922
DOI: 10.1143/JJAP.50.085002
期刊: JAPANESE JOURNAL OF APPLIED PHYSICS
Volume: 50
Issue: 8
結束頁: 
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