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dc.contributor.authorYang, Kai-Jiunen_US
dc.contributor.authorTsai, Shang-Hoen_US
dc.contributor.authorChuang, Gene C. H.en_US
dc.date.accessioned2014-12-08T15:29:44Z-
dc.date.available2014-12-08T15:29:44Z-
dc.date.issued2013-04-01en_US
dc.identifier.issn1063-8210en_US
dc.identifier.urihttp://dx.doi.org/10.1109/TVLSI.2012.2194315en_US
dc.identifier.urihttp://hdl.handle.net/11536/21355-
dc.description.abstractThis paper presents an multipath delay commutator (MDC)-based architecture and memory scheduling to implement fast Fourier transform (FFT) processors for multiple input multiple output-orthogonal frequency division multiplexing (MIMO-OFDM) systems with variable length. Based on the MDC architecture, we propose to use radix-N-s butterflies at each stage, where N-s is the number of data streams, so that there is only one butterfly needed in each stage. Consequently, a 100% utilization rate in computational elements is achieved. Moreover, thanks to the simple control mechanism of the MDC, we propose simple memory scheduling methods for input data and output bit/set-reversing, which again results in a full utilization rate in memory usage. Since the memory requirements usually dominate the die area of FFT/inverse fast Fourier transform (IFFT) processors, the proposed scheme can effectively reduce the memory size and thus the die area as well. Furthermore, to apply the proposed scheme in practical applications, we let N-s = 4 and implement a 4-stream FFT/IFFT processor with variable length including 2048, 1024, 512, and 128 for MIMO-OFDM systems. This processor can be used in IEEE 802.16 WiMAX and 3GPP long term evolution applications. The processor was implemented with an UMC 90-nm CMOS technology with a core area of 3.1 mm(2). The power consumption at 40 MHz was 63.72/62.92/57.51/51.69 mW for 2048/1024/512/128-FFT, respectively in the post-layout simulation. Finally, we analyze the complexity and performance of the implemented processor and compare it with other processors. The results show advantages of the proposed scheme in terms of area and power consumption.en_US
dc.language.isoen_USen_US
dc.subject3GPPen_US
dc.subject802.16en_US
dc.subjectfast Fourier transform (FFT)en_US
dc.subjectlong term evolution (LTE)en_US
dc.subjectmemory schedulingen_US
dc.subjectmultiple-input multiple-output (MIMO)en_US
dc.subjectorthogonal frequency division multiplexing (OFDM)en_US
dc.subjectoutput sortingen_US
dc.subjectpipeline multipath delay commutator (MDC)en_US
dc.subjectWiMAXen_US
dc.titleMDC FFT/IFFT Processor With Variable Length for MIMO-OFDM Systemsen_US
dc.typeArticleen_US
dc.identifier.doi10.1109/TVLSI.2012.2194315en_US
dc.identifier.journalIEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMSen_US
dc.citation.volume21en_US
dc.citation.issue4en_US
dc.citation.spage720en_US
dc.citation.epage731en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000316801700011-
dc.citation.woscount4-
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