完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | WANG, CC | en_US |
dc.contributor.author | LEE, WF | en_US |
dc.contributor.author | KU, TK | en_US |
dc.contributor.author | CHEN, MS | en_US |
dc.contributor.author | FENG, MS | en_US |
dc.contributor.author | HSIEH, IJ | en_US |
dc.contributor.author | CHENG, HC | en_US |
dc.date.accessioned | 2014-12-08T15:03:37Z | - |
dc.date.available | 2014-12-08T15:03:37Z | - |
dc.date.issued | 1995-01-01 | en_US |
dc.identifier.issn | 0021-4922 | en_US |
dc.identifier.uri | http://dx.doi.org/10.1143/JJAP.34.L85 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/2155 | - |
dc.description.abstract | A new fabrication technology has been used for field-emission triodes with the emitter-gate separation as small as 0.18 mum to reduce the turn-on and anode voltages. The technology is based on the thermal oxidation of silicon and low-pressure chemical vapor deposition (LPCVD) of polycrystalline silicon, making the fabrication of a sub-half-micronmeter gate opening easy and reproducible. The entire process requires use of only one photolithography mask, and does not require advanced high-resolution photolithographic techniques. In this device, the oxidation process serves the three purposes of sharpening the emitters, defining the emitter-gate separation, and achieving a high-quality insulator. The finished devices have the emitter situated exactly at the center of the gate opening due to a self-alignment process. Furthermore, the LPCVD polysilicon film can form gate electrodes with a smooth edge and a small gate opening due to excellent step coverage. | en_US |
dc.language.iso | en_US | en_US |
dc.subject | FIELD EMISSION | en_US |
dc.subject | EMITTER-GATE SEPARATION | en_US |
dc.subject | LPCVD | en_US |
dc.subject | GATE OPENING | en_US |
dc.subject | SHARPENING | en_US |
dc.title | A NEW FABRICATION TECHNOLOGY FOR FIELD-EMISSION TRIODES WITH EMITTER-GATE SEPARATION OF 0.18-MU-M | en_US |
dc.type | Article | en_US |
dc.identifier.doi | 10.1143/JJAP.34.L85 | en_US |
dc.identifier.journal | JAPANESE JOURNAL OF APPLIED PHYSICS PART 2-LETTERS | en_US |
dc.citation.volume | 34 | en_US |
dc.citation.issue | 1A | en_US |
dc.citation.spage | L85 | en_US |
dc.citation.epage | L87 | en_US |
dc.contributor.department | 電子工程學系及電子研究所 | zh_TW |
dc.contributor.department | Department of Electronics Engineering and Institute of Electronics | en_US |
dc.identifier.wosnumber | WOS:A1995QC36800026 | - |
dc.citation.woscount | 1 | - |
顯示於類別: | 期刊論文 |