完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | Lee, Xin-Ru | en_US |
dc.contributor.author | Chen, Chih-Lung | en_US |
dc.contributor.author | Chang, Hsie-Chia | en_US |
dc.contributor.author | Lee, Chen-Yi | en_US |
dc.date.accessioned | 2014-12-08T15:30:06Z | - |
dc.date.available | 2014-12-08T15:30:06Z | - |
dc.date.issued | 2012 | en_US |
dc.identifier.isbn | 978-1-4673-0219-7 | en_US |
dc.identifier.issn | 0271-4302 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/21579 | - |
dc.description.abstract | Among LDPC codes, LDPC convolutional codes (LDPC-CCs) seem to be more suitable for variable length applications. However, a LDPC-CC decoder is difficult to implement for its long latency and large storage usage. The stochastic computation makes the decoding of LDPC-CCs more efficient, but the boundary effect of sliding window causes poor performance. In this paper, a stochastic LDPC-CC decoder with virtual edge compensation as well as decoder architecture is presented. The simulation results based on (491, 3, 6) time-varying LDPC-CC show that under the same signal-to-noise ratio, our proposed decoder could achieve better performance, 60% less decoding latency and 40% storage reduction compared to log-BP decoder with 10 processors. | en_US |
dc.language.iso | en_US | en_US |
dc.subject | stochastic decoding | en_US |
dc.subject | LDPC convolutional codes | en_US |
dc.title | Stochastic Decoding for LDPC Convolutional Codes | en_US |
dc.type | Proceedings Paper | en_US |
dc.identifier.journal | 2012 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS 2012) | en_US |
dc.citation.spage | 2621 | en_US |
dc.citation.epage | 2624 | en_US |
dc.contributor.department | 電子工程學系及電子研究所 | zh_TW |
dc.contributor.department | Department of Electronics Engineering and Institute of Electronics | en_US |
dc.identifier.wosnumber | WOS:000316903702204 | - |
顯示於類別: | 會議論文 |