完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | Liu, Wen-Hao | en_US |
dc.contributor.author | Kao, Wei-Chun | en_US |
dc.contributor.author | Li, Yih-Lang | en_US |
dc.contributor.author | Chao, Kai-Yuan | en_US |
dc.date.accessioned | 2014-12-08T15:30:13Z | - |
dc.date.available | 2014-12-08T15:30:13Z | - |
dc.date.issued | 2013-05-01 | en_US |
dc.identifier.issn | 0278-0070 | en_US |
dc.identifier.uri | http://dx.doi.org/10.1109/TCAD.2012.2235124 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/21646 | - |
dc.description.abstract | Modern global routers employ various routing methods to improve routing speed and quality. Maze routing is the most time-consuming process for existing global routing algorithms. This paper presents two bounded-length maze routing (BLMR) algorithms (optimal-BLMR and heuristic-BLMR) that perform much faster routing than traditional maze routing algorithms. In addition, a rectilinear Steiner minimum tree aware routing scheme is proposed to guide heuristic-BLMR and monotonic routing to build a routing tree with shorter wirelength. This paper also proposes a parallel multithreaded collision-aware global router based on a previous sequential global router (SGR). Unlike the partitioning-based strategy, the proposed parallel router uses a task-based concurrency strategy. Finally, a 3-D wirelength optimization technique is proposed to further refine the 3-D routing results. Experimental results reveal that the proposed SGR uses less wirelength and runs faster than most of other state-of-the-art global routers with a different set of parameters [12], [16], [17], [20]. Compared to the proposed SGR, the proposed parallel router yields almost the same routing quality with average 2.71 and 3.12-fold speedup on overflow-free and hard-to-route cases, respectively, when running on a 4-core system. | en_US |
dc.language.iso | en_US | en_US |
dc.subject | global routing | en_US |
dc.subject | maze routing | en_US |
dc.subject | multithreaded routing | en_US |
dc.subject | physical design | en_US |
dc.subject | rip-up and reroute | en_US |
dc.title | NCTU-GR 2.0: Multithreaded Collision-Aware Global Routing with Bounded-Length Maze Routing | en_US |
dc.type | Article | en_US |
dc.identifier.doi | 10.1109/TCAD.2012.2235124 | en_US |
dc.identifier.journal | IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS | en_US |
dc.citation.volume | 32 | en_US |
dc.citation.issue | 5 | en_US |
dc.citation.spage | 709 | en_US |
dc.citation.epage | 722 | en_US |
dc.contributor.department | 資訊工程學系 | zh_TW |
dc.contributor.department | Department of Computer Science | en_US |
dc.identifier.wosnumber | WOS:000318163800005 | - |
dc.citation.woscount | 4 | - |
顯示於類別: | 期刊論文 |