完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | Liao, Yu-An | en_US |
dc.contributor.author | Lin, Wei-Hsun | en_US |
dc.contributor.author | Chao, Yi-Kai | en_US |
dc.contributor.author | Chang, Wen-Hao | en_US |
dc.contributor.author | Chyi, Jen-Inn | en_US |
dc.contributor.author | Lin, Shih-Yen | en_US |
dc.date.accessioned | 2014-12-08T15:30:35Z | - |
dc.date.available | 2014-12-08T15:30:35Z | - |
dc.date.issued | 2013-06-01 | en_US |
dc.identifier.issn | 0741-3106 | en_US |
dc.identifier.uri | http://dx.doi.org/10.1109/LED.2013.2258456 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/21855 | - |
dc.description.abstract | In-plane gate transistors (IPGTs) with 20-mu m channel widths are fabricated on samples with n-(InGa)As sheet resistance embedded in undoped GaAs matrix. A trade-off between effective current modulation and high saturation drain current is obtained by optimizing the doping density of the sheet resistance. The mechanism responsible for the transistor behaviors of the devices is due to the channel electron depletion related to the population of mobile surface electrons under different gate biases. The photocurrent measurements demonstrate that the IPGT architecture is a feasible approach for the applications of photodetectors. | en_US |
dc.language.iso | en_US | en_US |
dc.subject | Detectors | en_US |
dc.subject | in-plane gate transistors (IPGTs) | en_US |
dc.title | In-Plane Gate Transistors for Photodetector Applications | en_US |
dc.type | Article | en_US |
dc.identifier.doi | 10.1109/LED.2013.2258456 | en_US |
dc.identifier.journal | IEEE ELECTRON DEVICE LETTERS | en_US |
dc.citation.volume | 34 | en_US |
dc.citation.issue | 6 | en_US |
dc.citation.spage | 780 | en_US |
dc.citation.epage | 782 | en_US |
dc.contributor.department | 電子物理學系 | zh_TW |
dc.contributor.department | Department of Electrophysics | en_US |
dc.identifier.wosnumber | WOS:000319460800021 | - |
dc.citation.woscount | 2 | - |
顯示於類別: | 期刊論文 |