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dc.contributor.authorLin, Chun-Yuen_US
dc.contributor.authorChen, Wei-Lingen_US
dc.contributor.authorKer, Ming-Douen_US
dc.date.accessioned2014-12-08T15:30:43Z-
dc.date.available2014-12-08T15:30:43Z-
dc.date.issued2013-04-01en_US
dc.identifier.issn1932-4545en_US
dc.identifier.urihttp://dx.doi.org/10.1109/TBCAS.2012.2200481en_US
dc.identifier.urihttp://hdl.handle.net/11536/21938-
dc.description.abstractThe implantable stimulator for epileptic seizure suppression with loading impedance adaptability was proposed in this work. The stimulator consisted of the high voltage generator, output driver, adaptor, and switches, can constantly provide the required 40-mu A stimulus currents, as the loading impedance varied within 10 k Omega-300 k Omega. The performances of this design have been successfully verified in silicon chip fabricated by a 0.35-mu m 3.3-V/24-V CMOS process. The power consumption of this work was only 1.1 mW-1.4 mW. The animal test results with the fabricated chip of proposed design have successfully verified in the Long-Evans rats with epileptic seizures.en_US
dc.language.isoen_USen_US
dc.subjectAdaptabilityen_US
dc.subjectepilepsyen_US
dc.subjectepileptic seizure suppressionen_US
dc.subjectimplantable deviceen_US
dc.subjectstimulatoren_US
dc.titleImplantable Stimulator for Epileptic Seizure Suppression With Loading Impedance Adaptabilityen_US
dc.typeArticleen_US
dc.identifier.doi10.1109/TBCAS.2012.2200481en_US
dc.identifier.journalIEEE TRANSACTIONS ON BIOMEDICAL CIRCUITS AND SYSTEMSen_US
dc.citation.volume7en_US
dc.citation.issue2en_US
dc.citation.spage196en_US
dc.citation.epage203en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.department生醫電子轉譯研究中心zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.contributor.departmentBiomedical Electronics Translational Research Centeren_US
dc.identifier.wosnumberWOS:000318797100011-
dc.citation.woscount1-
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