標題: The intrinsic parameter fluctuation on high-kappa/metal gate bulk FinFET devices
作者: Li, Yiming
Su, Hsin-Wen
Chen, Yu-Yu
Hsu, Sheng-Chia
Huang, Wen-Tsung
資訊工程學系
Department of Computer Science
關鍵字: Random discrete dopant;Random interface trap;Random work function;Characteristic fluctuation;16-nm-gate;Bulk FinET;Statistical 3D device simulation
公開日期: 1-Sep-2013
摘要: In this work, based on the experimentally calibrated 3D device simulation, we for the first time estimate the impact of intrinsic parameter fluctuation on the electrical characteristic of 16-nm-gate TiN/HfO2 bulk FinFETs. The sources of intrinsic parameter fluctuation include the random discrete dopants, interface traps and work function differences, simultaneously. The full 3D simulated threshold voltage fluctuation, induced by the aforementioned random sources simultaneously, is 26.2 mV for the N-type bulk FinFET (and is 55.5 mV for the planar N-MOSFET). For the N-type bulk FinFE'T, the statistical sum of these fluctuations is 9.5% (and is 12.3% for the planar device) overestimation, compared with the full 3D simulation. One of the main reasons is the independence assumption on these random variables is destroyed owing to interactions to different extents among RDs, ITs and WKs. The coupled surface potentials cannot be simply estimated by using their statistical sum of individual random source. Under the same threshold voltage, compared with the result of the planar MOSFETs, more than 50% reduction on the threshold voltage fluctuation of the explored bulk FinFETs is observed owing to the benefit of 3D structural nature. (C) 2013 Elsevier B.V. All rights reserved.
URI: http://dx.doi.org/10.1016/j.mee.2013.03.076
http://hdl.handle.net/11536/22107
ISSN: 0167-9317
DOI: 10.1016/j.mee.2013.03.076
期刊: MICROELECTRONIC ENGINEERING
Volume: 109
Issue: 
起始頁: 302
結束頁: 305
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