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dc.contributor.authorLin, Horng-Chihen_US
dc.contributor.authorLin, Zer-Mingen_US
dc.contributor.authorHuang, Tiao-Yuanen_US
dc.date.accessioned2014-12-08T15:31:35Z-
dc.date.available2014-12-08T15:31:35Z-
dc.date.issued2013-04-01en_US
dc.identifier.issn0021-4922en_US
dc.identifier.urihttp://dx.doi.org/10.7567/JJAP.52.04CC18en_US
dc.identifier.urihttp://hdl.handle.net/11536/22393-
dc.description.abstractIn this study, we proposed a new methodology for probing the electrical properties of heavily doped polycrystalline silicon (poly-Si) nanowires (NWs), including active doping concentration, mobility, and interface fixed charge density. Implementation of this procedure is based on the modulation of the device operation of a gate-all-around (GAA) junctionless (J-less) transistor from the gated resistor mode to the ungated one. The extracted carrier concentration in the NW is found to be much lower than that of Hall measurements, while a negative fixed charge density is identified with the procedure. Dopant segregation at the oxide interface is postulated to be closely related to these observations. (C) 2013 The Japan Society of Applied Physicsen_US
dc.language.isoen_USen_US
dc.titleA New Methodology for Probing the Electrical Properties of Heavily Phosphorous-Doped Polycrystalline Silicon Nanowiresen_US
dc.typeArticleen_US
dc.identifier.doi10.7567/JJAP.52.04CC18en_US
dc.identifier.journalJAPANESE JOURNAL OF APPLIED PHYSICSen_US
dc.citation.volume52en_US
dc.citation.issue4en_US
dc.citation.epageen_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000320002400037-
dc.citation.woscount0-
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