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dc.contributor.authorLiu, Wei-Changen_US
dc.contributor.authorYeh, Fu-Chunen_US
dc.contributor.authorWei, Ting-Chenen_US
dc.contributor.authorChan, Ching-Daen_US
dc.contributor.authorJou, Shyh-Jyeen_US
dc.date.accessioned2014-12-08T15:32:16Z-
dc.date.available2014-12-08T15:32:16Z-
dc.date.issued2013-10-01en_US
dc.identifier.issn1549-8328en_US
dc.identifier.urihttp://dx.doi.org/10.1109/TCSI.2013.2244321en_US
dc.identifier.urihttp://hdl.handle.net/11536/22698-
dc.description.abstractIn this paper, a digital time domain equalizer (TDE) for 60 GHz radio frequency transmission systems is presented. Significantly, the TDE supports both single carrier (SC) and orthogonal frequency-division multiplexing (OFDM) operation modes for digital baseband receiver. In order to improve the performance, the proposed TDE adopts Golay sequence aided one-shot channel estimation and modified multi-path interference cancellation (MPIC) equalization. Targeting on the line-of-sight (LOS) channel characteristic, MPIC is simplified with single-tap for complexity reduction. From the area efficiency point of view, both SC and OFDM modes are designed within a single hardware to yield 99% of area sharing. The Golay-MPIC TDE structure is realized as feed-forward data path with 8X-parallelism to achieve 2.64 GS/s at 330 MHz clock rate. The Golay-MPIC TDE is fabricated as a part of a digital baseband with 65 nm 1P9M general purpose process. The area of Golay-MPIC TDE occupies 1.05 with 405 K gate counts. Besides, the power dissipations for SC and ODFM modes are 56.71 mW@220 MHz (1 V) and 91.29 mW@330 MHz (1.1 V), respectively. Finally, the chip can provide the maximum throughput 15.84 Gb/s (2.64 GS/s with 64-QAM modulation).en_US
dc.language.isoen_USen_US
dc.subjectDual modesen_US
dc.subjectOFDMen_US
dc.subjectSCen_US
dc.subjecttime domain equalizeren_US
dc.subjectWPANen_US
dc.subject60 GHzen_US
dc.subject802.15.3cen_US
dc.titleA Digital Golay-MPIC Time Domain Equalizer for SC/OFDM Dual-Modes at 60 GHz Banden_US
dc.typeArticleen_US
dc.identifier.doi10.1109/TCSI.2013.2244321en_US
dc.identifier.journalIEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERSen_US
dc.citation.volume60en_US
dc.citation.issue10en_US
dc.citation.spage2730en_US
dc.citation.epage2739en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000325225700017-
dc.citation.woscount2-
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