完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | CHANG, CY | en_US |
dc.contributor.author | LIN, CY | en_US |
dc.contributor.author | CHOU, JW | en_US |
dc.contributor.author | HSU, CCH | en_US |
dc.contributor.author | PAN, HT | en_US |
dc.contributor.author | KO, J | en_US |
dc.date.accessioned | 2014-12-08T15:03:44Z | - |
dc.date.available | 2014-12-08T15:03:44Z | - |
dc.date.issued | 1994-11-01 | en_US |
dc.identifier.issn | 0741-3106 | en_US |
dc.identifier.uri | http://dx.doi.org/10.1109/55.334659 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/2277 | - |
dc.description.abstract | The boron-penetration-dependent Reverse Short Channel Effect (RSCE) on the threshold voltage is observed for short channel p+ poly-gate PMOSFET's. The RSCE is found to be more significant as the boron penetration becomes more severe. The RSCE is significant in BF2 doped poly-gated MOS devices and is alleviated in buffered poly-gated MOS devices. Fluorine enhanced boron diffusion in the gate oxide during high temperature process is believed to account for the RSCE, which is also confirmed by using a two-dimensional process simulator. | en_US |
dc.language.iso | en_US | en_US |
dc.title | ANOMALOUS REVERSE SHORT-CHANNEL EFFECT IN P+ POLYSILICON GATED P-CHANNEL MOSFET | en_US |
dc.type | Article | en_US |
dc.identifier.doi | 10.1109/55.334659 | en_US |
dc.identifier.journal | IEEE ELECTRON DEVICE LETTERS | en_US |
dc.citation.volume | 15 | en_US |
dc.citation.issue | 11 | en_US |
dc.citation.spage | 437 | en_US |
dc.citation.epage | 439 | en_US |
dc.contributor.department | 電控工程研究所 | zh_TW |
dc.contributor.department | 奈米中心 | zh_TW |
dc.contributor.department | Institute of Electrical and Control Engineering | en_US |
dc.contributor.department | Nano Facility Center | en_US |
dc.identifier.wosnumber | WOS:A1994PT32600001 | - |
dc.citation.woscount | 12 | - |
顯示於類別: | 期刊論文 |