標題: | A PARALLEL BIT-LEVEL MAXIMUM MINIMUM SELECTOR TO DIGITAL AND VIDEO SIGNAL-PROCESSING |
作者: | LEE, CY JUAN, SC YANG, WW 電子工程學系及電子研究所 Department of Electronics Engineering and Institute of Electronics |
公開日期: | 1-十月-1994 |
摘要: | This paper presents a novel circuit for parallel bit-level maximum/minimum selection. The selection is based on a label-updating scheme which sequentially scans a set of data patterns from MSB to LSB and generates corresponding labels. The complete circuit realizing this scheme consists of a set of updating units and a global OR unit, where each updating unit is composed of only a few basic gates. Due to structure modularity, the developed circuit provides a very cost-effective hardware solution for comparing large volumes of data patterns as those required in digital and video signal processing. |
URI: | http://dx.doi.org/10.1109/82.329739 http://hdl.handle.net/11536/2298 |
ISSN: | 1057-7130 |
DOI: | 10.1109/82.329739 |
期刊: | IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-ANALOG AND DIGITAL SIGNAL PROCESSING |
Volume: | 41 |
Issue: | 10 |
起始頁: | 693 |
結束頁: | 695 |
顯示於類別: | 期刊論文 |