The TEOS CVD oxide deposited on phosphorus in situ doped polysilicon with rapid thermal annealing

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DC 欄位	值	語言
dc.contributor.author	Kao, CH	en_US
dc.contributor.author	Lai, CS	en_US
dc.contributor.author	Lee, CL	en_US
dc.date.accessioned	2014-12-08T15:01:22Z	-
dc.date.available	2014-12-08T15:01:22Z	-
dc.date.issued	1997-11-01	en_US
dc.identifier.issn	0741-3106	en_US
dc.identifier.uri	http://dx.doi.org/10.1109/55.641434	en_US
dc.identifier.uri	http://hdl.handle.net/11536/229	-
dc.description.abstract	A TEOS oxide deposited on the phosphorus in situ doped polysilicon annealed with RTA is shown to have good electrical characteristics such as a high breakdown field (>12 MV/cm), especially for the positive bias, and a large Qbd (26 Coul/cm(2)). The improvement is believed to be due to the relatively smooth surface of the in situ doped polysilicon and the reduction of the trapping density by RTA.	en_US
dc.language.iso	en_US	en_US
dc.title	The TEOS CVD oxide deposited on phosphorus in situ doped polysilicon with rapid thermal annealing	en_US
dc.type	Article	en_US
dc.identifier.doi	10.1109/55.641434	en_US
dc.identifier.journal	IEEE ELECTRON DEVICE LETTERS	en_US
dc.citation.volume	18	en_US
dc.citation.issue	11	en_US
dc.citation.spage	526	en_US
dc.citation.epage	528	en_US
dc.contributor.department	交大名義發表	zh_TW
dc.contributor.department	電子工程學系及電子研究所	zh_TW
dc.contributor.department	National Chiao Tung University	en_US
dc.contributor.department	Department of Electronics Engineering and Institute of Electronics	en_US
顯示於類別：	期刊論文

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