標題: Reduction of current mismatching in the switches-in-source CMOS charge pump
作者: Shiau, Miin-Shyue
Hsu, Heng-Shou
Cheng, Ching-Hwa
Weng, Hsiu-Hua
Wu, Hong-Chong
Liu, Don-Gey
電子工程學系及電子研究所
Department of Electronics Engineering and Institute of Electronics
關鍵字: Phase-lock loop;Charge pump;Current mismatch
公開日期: 1-Dec-2013
摘要: In this paper, the charge pump (CP) based on a switches-in-source architecture is to be improved by gain-boosting amplifiers for phase-locked loops (PLLs). In our design, two differential amplifiers were employed in this CP to reduce the effect of the channel length modulation in MOS transistors. As a result, the up and down currents will be rather independent of the output voltage transformed by the capacitive low pass filter (LPF). This circuit was implemented using TSMC 0.18-mu m CMOS technology and was investigated at a power supply of 1.8 V. The measured mismatch was less than 1% for the output voltage ranging from 0.4 to 1.4 V. This result is lower than that of the dynamic current-matching CP with feedback tuning on the same architecture. A comparison will be presented and discussed. (C) 2013 Elsevier Ltd. All rights reserved.
URI: http://dx.doi.org/10.1016/j.mejo.2013.08.019
http://hdl.handle.net/11536/23432
ISSN: 0026-2692
DOI: 10.1016/j.mejo.2013.08.019
期刊: MICROELECTRONICS JOURNAL
Volume: 44
Issue: 12
起始頁: 1296
結束頁: 1301
Appears in Collections:Articles


Files in This Item:

  1. 000329267500031.pdf

If it is a zip file, please download the file and unzip it, then open index.html in a browser to view the full text content.