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dc.contributor.authorCheng, Chun Huen_US
dc.contributor.authorChin, Alberten_US
dc.date.accessioned2014-12-08T15:35:05Z-
dc.date.available2014-12-08T15:35:05Z-
dc.date.issued2014-02-01en_US
dc.identifier.issn0741-3106en_US
dc.identifier.urihttp://dx.doi.org/10.1109/LED.2013.2291560en_US
dc.identifier.urihttp://hdl.handle.net/11536/23812-
dc.description.abstractPower consumption is the most difficult challenge for CMOS integrated circuits. Here, we demonstrate experimentally a novel steep turn-on pMOSFET for low-voltage operation for the first time, which exhibits 5-60 mV/decade SS, wide voltage range for SS < 60 mV/decade, sturdy < 60 mV/decade SS at 85 degrees C, faster transistor turn-on at above threshold voltage, and lower off-state leakage by greater than three orders of magnitude. Such improved leakage current is crucial to decrease the OFF-state leakage current in sub-1X nm CMOS. This was achieved using ferroelectric high-kappa ZrHfO gate dielectric pMOSFET.en_US
dc.language.isoen_USen_US
dc.subjectFerroelectricen_US
dc.subjectZrHfOen_US
dc.subjecttransistoren_US
dc.subjectsub-threshold swingen_US
dc.titleLow-Voltage Steep Turn-On pMOSFET Using Ferroelectric High-kappa Gate Dielectricen_US
dc.typeArticleen_US
dc.identifier.doi10.1109/LED.2013.2291560en_US
dc.identifier.journalIEEE ELECTRON DEVICE LETTERSen_US
dc.citation.volume35en_US
dc.citation.issue2en_US
dc.citation.spage274en_US
dc.citation.epage276en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000331377500042-
dc.citation.woscount3-
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