完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | Chang, Chia-Ling | en_US |
dc.contributor.author | Wu, Jieh-Tsorng | en_US |
dc.date.accessioned | 2014-12-08T15:35:45Z | - |
dc.date.available | 2014-12-08T15:35:45Z | - |
dc.date.issued | 2013 | en_US |
dc.identifier.isbn | 978-1-4673-5762-3; 978-1-4673-5760-9 | en_US |
dc.identifier.issn | 0271-4302 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/24135 | - |
dc.description.abstract | A 2-1 MASH delta-sigma modulator (DSM) was fabricated using a 90nm CMOS technology. Operating at 6.25 MHz clock rate, this chip consumes 860 mu W under a 1 V supply. The over-sampling ratio is 128, and the signal-bandwidth is 24.4 kHz. This chip achieves a performance of 88 dB SNDR and 90 dB SNR. Its dynamic range is 100 dB. The chip area is 0.44 mm(2). | en_US |
dc.language.iso | en_US | en_US |
dc.title | A 1-V 100-dB Dynamic Range 24.4-kHz Bandwidth Delta-Sigma Modulator | en_US |
dc.type | Proceedings Paper | en_US |
dc.identifier.journal | 2013 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS) | en_US |
dc.citation.spage | 813 | en_US |
dc.citation.epage | 816 | en_US |
dc.contributor.department | 電子工程學系及電子研究所 | zh_TW |
dc.contributor.department | Department of Electronics Engineering and Institute of Electronics | en_US |
dc.identifier.wosnumber | WOS:000332006801017 | - |
顯示於類別: | 會議論文 |